26-01-2019, 02:02 PM
I can see no particular problems in making a 567 line output. Is there a document with the video and RF specifications for 567? The modulators can do just about anything. For many standards a single modulator can do both sound and vision but the combination of AM sound, 3.5MHz sound/vision spacing and +ve vision modulation was impossible with a single chip.
I haven't looked at Frank's VHDL but If you're designing for multiple standards I would have all the numbers for each standard specified separately from the logic.
This is a possible way to specifiy horizontal sync pulses with the numbers included in the logic. To change the standard you have to go through the code and change all the numbers:
HSYNC_START <= HCOUNT = 6;
HSYNC_END <= HCOUNT = 135;
if HSYNC_START then HSYNC <= true;
elsif HSYNC_END then HSYNC <= false
else HYSNC <= HSYNC;
end if;
This is a more general form. HSYNC_START_COUNT and HSYNC_END_COUNT are specified in a table of values for that standard. Possibly in a different file.
HSYNC_START <= HCOUNT = HSYNC_START_COUNT;
HSYNC_END <= HCOUNT = HSYNC_END_COUNT;
if HSYNC_START then HSYNC <= true;
elsif HSYNC_END then HSYNC <= false
else HYSNC <= HSYNC;
end if;
Or if you want switchable multistandard operation you would have a CASE statement. This would include all the numbers that change for different standards:
case OUTPUT_STANDARD is
when S405_50i =>
HSYNC_START_COUNT <= 6;
HSYNC_END_COUNT <= 135;
when S567_50i =>
HSYNC_START_COUNT <= 8;
HSYNC_END_COUNT <= 119;
when others =>
HSYNC_START_COUNT <= 6;
HSYNC_END_COUNT <= 135;
end case;
Please note that all the numbers I have used are pure fiction. I haven't bothered to do any sums to find out what they actually should be.
The standard names such as S405_50i can either be an enumerated type in VHDL or allocated as constants. This is an extract from a file called "general_constants.vhd" that I have included as a package in a library in some of my own professional designs:
constant S720_30p : integer := 12;
constant S720_25p : integer := 13;
constant S1080_48p : integer := 14;
constant S720_24p : integer := 15;
constant S525_60i : integer := 16;
constant S625_50i : integer := 17;
Because all of Frank's design is open source, anyone is free to experiment as they wish. Unlike the Aurora where the design is proprietary.
I haven't looked at Frank's VHDL but If you're designing for multiple standards I would have all the numbers for each standard specified separately from the logic.
This is a possible way to specifiy horizontal sync pulses with the numbers included in the logic. To change the standard you have to go through the code and change all the numbers:
HSYNC_START <= HCOUNT = 6;
HSYNC_END <= HCOUNT = 135;
if HSYNC_START then HSYNC <= true;
elsif HSYNC_END then HSYNC <= false
else HYSNC <= HSYNC;
end if;
This is a more general form. HSYNC_START_COUNT and HSYNC_END_COUNT are specified in a table of values for that standard. Possibly in a different file.
HSYNC_START <= HCOUNT = HSYNC_START_COUNT;
HSYNC_END <= HCOUNT = HSYNC_END_COUNT;
if HSYNC_START then HSYNC <= true;
elsif HSYNC_END then HSYNC <= false
else HYSNC <= HSYNC;
end if;
Or if you want switchable multistandard operation you would have a CASE statement. This would include all the numbers that change for different standards:
case OUTPUT_STANDARD is
when S405_50i =>
HSYNC_START_COUNT <= 6;
HSYNC_END_COUNT <= 135;
when S567_50i =>
HSYNC_START_COUNT <= 8;
HSYNC_END_COUNT <= 119;
when others =>
HSYNC_START_COUNT <= 6;
HSYNC_END_COUNT <= 135;
end case;
Please note that all the numbers I have used are pure fiction. I haven't bothered to do any sums to find out what they actually should be.
The standard names such as S405_50i can either be an enumerated type in VHDL or allocated as constants. This is an extract from a file called "general_constants.vhd" that I have included as a package in a library in some of my own professional designs:
constant S720_30p : integer := 12;
constant S720_25p : integer := 13;
constant S1080_48p : integer := 14;
constant S720_24p : integer := 15;
constant S525_60i : integer := 16;
constant S625_50i : integer := 17;
Because all of Frank's design is open source, anyone is free to experiment as they wish. Unlike the Aurora where the design is proprietary.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv







