Building a Standards Converter

[ppppenguin]

You probably won't need to do this but if you're making a 601 output you need to exclude the codes 00 and FF from the output stream as they can be misinterpreted as TRS (sync) information at the receiver. The VHDL is very simple. Here's an example for 8 bit operation:

if INPUT_VIDEO = X"00" then OUTPUT_VIDEO <= X"01";
elsif INPUT_VIDEO = X"FF" then OUTPUT_VIDEO <= X"FE";
else OUTPUT_VIDEO <= INPUT_VIDEO;
endif;

For 10 bit you have to exclude 0-3 and 1020 to 1023 hence: if INPUT_VIDEO <= "0000000011" then OUTPUT_ VIDEO <= "0000000100"; etc. Which shows one of the annoyances of VHDL when dealing with signals that aren't multiples of 4 bits long. Of course you can use integer type to make the expressions clearer.

All of this will be efficiently synthesised by the VHDL tools.