405 lines from Raspberry Pi 5

[ppppenguin]

Well done with the design. Not sure if Darryl got there first for the Aurora, or copied David's design or arrived at it independently. In any case it wasn't possible to do System A with a single modulator chip though I think that both Darryl and David tried.

I'm amazed that the Motorola (or whatever it is now) modulator device is still available. It was declared obsolete many years ago. Either production has restarted or we're living off old stock. There have been reports of a few duff devices.

I don't have access to my notes at the moment but there was a problem when using an external clock to drive these chips. ISTR the cure was to change the value of the series resistor.

[`FRANK.C]

Hi Jeffrey
You are correct about using a external clock source.
The drive must be kept low or pattering may result. From a 3.3 V clock source I put a 1pF capacitor in series with it.

Frank

[OldTVEnthusiast]

I copied you on the 1pf series cap Frank, thought there must be a good reason for that! It remains to be seen if I’ve chosen a reasonable layout for the modulators…it’s V1.0 for a reason!
Yes I’ve got quite a few of the MBS373 bought from AliExpress a few years back and they are still readily available for around £1

[ppppenguin]

Some background to providing a clock for the modulators. These chips were originally designed to use a crystal and not need an external clock. I don't recall what David Robinson did but Darryl used an external clock. It saves two crystals.

ISTR the problem with the external clock turned up in an Aurora that I was sent because it was misbehaving. At the time I was the semi-official support service for Auroras in the UK and Europe. The problem turned out to be that the chip was fussy about its drive voltage. It didn't like being overdriven. So I increased the series resistor to something about halfway between overdrive troubles and failing due to lack of drive. That mod became standard in all future production. Frank will have to say why he used a small capacitor rather than a resistor but it strikes me as a sensible alternative.

This may be a good time to remind new users of Aurora, Hedghog and now this hat that the output voltage is way too high for many TVs. If driving just one set, without using splitters, it's important to use an attenuator. Anywhere from 10dB to 20dB should be OK. Having the full output available can be useful when dealing with a faulty TV.

[`FRANK.C]

David used a crystal for each modulator chip.
In the Vol modulator I did also. While not impossible there was no convenient way of getting a clock from the PIC I used and space wasn't a problem on the PCB.

In the Hedghog L resources were limited in the FPGA and the clock generation for the modulators was farmed out to the PIC. The PIC used was chosen as it has a reference clock output which is used to drive the modulators. This arrangement was kept for subsequent Hedghog's.

Why I used a capacitor instead of a resistors? At the time I had no idea how Darryl or anyone else did it. Looking at the diagram in the data sheet there is a capacitor in series with the crystal. So I figured it was the way to go. Also a capacitor would isolate any DC conditions on that pin from the clock.

Frank

[ppppenguin]

Here's the relevant bit of the Aurora circuit. The 2K2 resistor was originally 470R.

Darryl generated the clock in the FPGA.

[Mike Watterson]

This might seem like a stupid idea or silly question.
The choices of audio carrier offset are preset, but everything seems to be divided from a 4 MHz master clock, with some PLLs. The audio uses a 31.25 Khz or 62.5 KHz reference for the PLL and divider, and selection of and offset of 4.5, 5.5, 6.0 or 6.5 MHz from the video carrier, rather than setting the frequency direct as with the video modulator. The range is 30 MHz to 450 MHz or 471.25 MHz to 855.25.

So if a reference other than 4 MHz is used, will if still work, but simply every frequency be scaled by the percent change?
So would reducing 4 MHz to 3.111111 MHz give 3.5 MHz offset between carriers when you select 4.5 MHz?
Obviously all the channels would be 3.5/4.5 lower,

System A frequencies vs ch on cols 1 & 2
Ch Video Audio A Audio N Video 2 Audio 2
4.5 0.7777777777777778
1 45 41.5 49.5 35.000 38.500
2 51.75 48.25 56.25 40.250 43.750
3 56.75 53.25 61.25 44.139 47.639
4 61.75 58.25 66.25 48.028 51.528
5 66.75 63.25 71.25 51.917 55.417
6 179.75 176.25 184.25 139.806 143.306
7 184.75 181.25 189.25 143.694 147.194
8 189.75 186.25 194.25 147.583 151.083
9 194.75 191.25 199.25 151.472 154.972
10 199.75 196.25 204.25 155.361 158.861
11 204.75 201.25 209.25 159.250 162.750
12 209.75 206.25 214.25 163.139 166.639
13 214.75 211.25 219.25 167.028 170.528

i,e. 4 MHz replaced by 3.111111, selected 4.5 MHz offset is then 3.5 MHz and last two columns are frequencies you get setting frequency in first column.
The 31.25 / 62.5 KHz would be 24.306 and 48.611 kHz approximately?

"The reference divider is a fixed divide-by-128, resulting in a reference frequency of 31.25 kHz with a 4.0-MHz crystal."
"For low-frequency testing or VHF range operation (test mode 1, states 1.b to 1.e) the UHF oscillator can be internally divided by 2, 4, 8, or 16."

The steps in UHF mode are 250 KHz with 4 MHz reference. The VHF steps with divide by 16 are thus 15.625 KHz
N0–N11: UHF frequency programming bits, in steps of 250 kHz. See Section 15.7, “UHF PLL Section,” for more information.
Table 17 lists bits X2 X1 X0 = 1 0 0 for RF/16 (the 30 MHz to 54 MHz @ 4MHz)
0 1 0 is RF/4, so 117 MHz to 213 MHz

I think the 471.25 MHz to 855.25 becomes 366.334 MHz to 665 MHz with the 3.1111MHz external clock.
30 MHz to 54 MHz -> 23.333 to 42 MHz, which is too low. Using RF/8 gives 46.666 to 84 MHz. The steps will be 24.306 Khz approx instead of 31.25 KHz
The RF/2 ratio will give about 182 MHz to 332.5 MHz with 97 kHz steps

Probably I'm misunderstanding something?

[Mike Watterson]

Actually the minimum UHF oscillator is 460 MHz rather than 471 MHz suggested by C21.
15.7 UHF PLL Section
The reference divider is a fixed divide-by-128, resulting in a reference frequency of 31.25 kHz with a
4.0-MHz crystal.
The prescaler is a fixed divide-by-8 and is permanently engaged.
The programmable divider division ratio is controlled by the state of control bits N0 to N11.
The divider ratio N for a desired frequency F (in MHz) is given by:
F 128
N = --- × ----------
8
4
with:
N = 2048 × N11 + 1024 × N10 + ...... + 4 × N2 + 4 × N1 + N0
(I think that should be 2 x N1)

Obviously minimum is 2048 x1
If other than 4MHz reference is used the 2048 is the reference / 2, thus for 3.111111 MHz the equation is
N MHz = 1555.555555 × N11 + 777.777 × N10 + ...... etc, or original x ratio of (new clock)/4

However the minimum frequency for lock may still be near 460 MHz, so the minimum N0 to N11 is more than 1.

[ppppenguin]

Interesting idea. It would be easy enough for Frank to try out on a Hedghog. The chip can certainly do +ve vision with AM sound for System K. I think that's 6.5MHz separation. I don't know if the chip can be programmed to do +ve vision with AM sound at 4.5MHz separation.

I don't think the chip uses any form of intercarrier sound tricks (could be wrong, I'm away from all my documents) as this would wreck the idea. Intercarrier sound modulation with AM sound and especially with +ve vision is almost impossible anyway as the minimum vision carrier level has to approach zero at sync tips.

[ppppenguin]

Further thought for making the carefully selected input frequency to the modulator. I'm sure Frank knows how to do this, but you can easily make a non-integer frequency divider with an adder and register. Sometimes called a discrete time oscillator. The main disadvantage is that the period of each output cycle will jitter by the input clock period. This may or may not matter for the input to the modulator. Only way to find out is by experiment.

You can use a DTO to make accurate sine waves such as PAL or NTSC subcarrier. The designers of high grade synthesised signal generators have various techniques to get very good spectrum purity. To reduce the jitter problems slightly you can do simple stepwise approximation with 2 or 3 bits and some resistors.