08-01-2023, 04:33 PM
Using FPGAs that are only just about big enough is a route to madness. Been there, done that, got several t-shirts. Even if the logic will nominally fit in the device, the place and route often struggles as the device gets more than about 80% full. If the speed constraints are tight (probably not true for a 625>405 converter in a modern FPGA) then timing closure turns into a nightmare. I can't imagine that these problems are unique to XIlinx FPGAs.
The time to possibly move to a smaller device is after you've done the development. Until then you're prone to the "oh ****, how do I get that extra bit of functionality into the chip". Again been there, done....... Too often.
The time to possibly move to a smaller device is after you've done the development. Until then you're prone to the "oh ****, how do I get that extra bit of functionality into the chip". Again been there, done....... Too often.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv
