05-01-2020, 06:24 PM
I finally got back to this after a long break. After having a better look at the problem and it appears that PLL that I was implementing isn't at fault instead it is caused by the jitter on the decoder video clock. To my surprise there is some jitter on the syncs from the Freeview box. It changes depending on file and scene been viewed. The jitter on the syncs combined with the jitter on the data clock is what is causing the problem. It is amassing how most files convert perfectly.
I tried cleaning up the data clock by varying the reference clock to the decoder. Nothing worked until I tried overclocking it which gave a perfectly clean clock.
When overclocked the data clock frequency is 4 X pixel frequency which is approximately 35MHz and substantially higher than the normal 27MHz.
This makes a big difference as now I will be able to use the PLL in the FPGA to generate the clocks. It also makes it easier to fit it into a Hedghog II.
The biggest concern is how well will the TVP5150 tolerate been overclocked. So far I have tried it out on a few of them. They all worked and showed no signs of distress.
Frank
I tried cleaning up the data clock by varying the reference clock to the decoder. Nothing worked until I tried overclocking it which gave a perfectly clean clock.
When overclocked the data clock frequency is 4 X pixel frequency which is approximately 35MHz and substantially higher than the normal 27MHz.
This makes a big difference as now I will be able to use the PLL in the FPGA to generate the clocks. It also makes it easier to fit it into a Hedghog II.
The biggest concern is how well will the TVP5150 tolerate been overclocked. So far I have tried it out on a few of them. They all worked and showed no signs of distress.
Frank
