26-11-2019, 03:10 PM
(This post was last modified: 26-11-2019, 03:12 PM by Mike Watterson.)
Maybe a better than 6Mhz clock ADC with enough resolution is really expensive?
I bought an FPGA dev system with the idea of doing a decent SDR, real RF input. Most SDRs only use like a sound card ADC and often triple conversion IF. I soon found that with enough clock speed and resolution for the dynamic range, an ADC was impossibly expensive. The onboard ADC and DAC was similar to a PC audio chip. Most SDR rely on an analogue AGC loop from the 455kHz IF and conversion from 455KHz to 12 KHz, 24 kHz or 48 kHz (a 96 kHz ADC).
The DTT sticks used for VHF/UHF SDR are particularly bad as they are only 8bit. You really need decent pre-filters and gain controls or else they are really a toy.
I bought an FPGA dev system with the idea of doing a decent SDR, real RF input. Most SDRs only use like a sound card ADC and often triple conversion IF. I soon found that with enough clock speed and resolution for the dynamic range, an ADC was impossibly expensive. The onboard ADC and DAC was similar to a PC audio chip. Most SDR rely on an analogue AGC loop from the 455kHz IF and conversion from 455KHz to 12 KHz, 24 kHz or 48 kHz (a 96 kHz ADC).
The DTT sticks used for VHF/UHF SDR are particularly bad as they are only 8bit. You really need decent pre-filters and gain controls or else they are really a toy.
