New language....

[ppppenguin]

For some reason I thought you already had one of these: https://www.xilinx.com/products/boards-a.../arty.html

I've been doing VHDL for some years. Not in any very clever way but I've found methods and styles that suit me and my designs. In particular I've not done much simulation - I tend to compile the code and see how it flies.

One of the biggest adjustments that software guys have to make when doing VHDL is remembering that it's not executed sequentially. And that it's generating hardware. In many cases the order of statements is unimportant. So for example:

COUNT <= COUNT + 1;

synthesises a simple up counter (of however many bits you declared) but

COUNT <= COUNT + 1;
COUNT <= COUNT + 2;

is a horrible thing to say in VHDL. In many languages it would add 1, then add 2 to COUNT. Honestly not sure what it would do in VHDL. It's legal (I think) and will synthesise but should never be done.

Please feel free to ask questions.

Thanks for the book recommendation.