21-07-2016, 11:40 AM
DAC is built and tested. Definitely glitchy at the MSB and MSB-1 transitions and not monotonic at the MSB transition. Didn't expect any better. Only getting 980mV out of it when loaded with 75R rather than 1027mV. Almost 5% low which is more than I'd hoped. I think it's mainly due to the 3.3V rail being a little low and the outputs drooping under load by more than I'd hoped. Not complaining too much. I can fine tune the 200R resistor on the output to get the amplitude spot on, albeit at the expense of accurate output impedance. 220R gives me 1020mV with a theoretical output impedance of 120R//220R = 77.6R. Probably a little higher as the output impedance of the logic will contribute something. Still more than good enough for the intended application.
Did I say this was rough and ready engineering
Fans of the Aurora SCRF may be interested to know that Darryl used a similar R-2R DAC but with a clever twist to get 10 bit conversion from a 7 bit DAC. I won't give away his trade secrets here but not only does it save components and pins on the FPGA but it also gives better accuracy. His basic ladder values are 1K and 2K which will give rather better results than my low values. He uses an emitter follower to give a 75R output.
Did I say this was rough and ready engineering
Fans of the Aurora SCRF may be interested to know that Darryl used a similar R-2R DAC but with a clever twist to get 10 bit conversion from a 7 bit DAC. I won't give away his trade secrets here but not only does it save components and pins on the FPGA but it also gives better accuracy. His basic ladder values are 1K and 2K which will give rather better results than my low values. He uses an emitter follower to give a 75R output.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv
