14-07-2016, 06:50 AM
I've some sums on subcarrier generation. This is done with an adder/accumulator, sometimes called a numerically controlled oscillator(NCO) or discrete time oscillator (DTO). https://en.wikipedia.org/wiki/Numericall...oscillator
In this case the available clock is 25MHz and the required frequency is 4.43361875MHz. Hence the amount to be added on each clock cycle is 4.433../25 = 0.1773.... I ran a spreadsheet for different numbers of bits in the accumulator. Since the computed coefficient isn't an integer and the actual coefft is integer there will be an error so I worked it out for all accumulator sizes from 8 to 32 bits. In parts per million it's horrible up to 16 bits. At 17 bits it's -3ppm which is acceptable for this application.
To give an idea of how to get it exactly right for my professional designs I use 32 or 36 bit accumulators. These give negligible errors but the relationship must be exact. In PAL the subcarrier and H timing recur over an 8 field sequence so I reset the accumulator every 8 fields. This also has the merit of lokcing phase as well as frequency which matters in the professional world. The phase jump is a tiny fraction of a degree for the big accumulators I use.
There is way of using a DTO to give exact ratios where the denominator isn't a binary power. I believe that the method is by John Chambers who worked at BBC Research labs many years ago. This involves changing the coefft when the accumulator overflows. It's not too hard to do and may allow a smaller accumulator. Though as it increases complexity elsewhere it may not give an overall saving. I can't find an online reference at the moment, can't even find my own notes.
In this case the available clock is 25MHz and the required frequency is 4.43361875MHz. Hence the amount to be added on each clock cycle is 4.433../25 = 0.1773.... I ran a spreadsheet for different numbers of bits in the accumulator. Since the computed coefficient isn't an integer and the actual coefft is integer there will be an error so I worked it out for all accumulator sizes from 8 to 32 bits. In parts per million it's horrible up to 16 bits. At 17 bits it's -3ppm which is acceptable for this application.
To give an idea of how to get it exactly right for my professional designs I use 32 or 36 bit accumulators. These give negligible errors but the relationship must be exact. In PAL the subcarrier and H timing recur over an 8 field sequence so I reset the accumulator every 8 fields. This also has the merit of lokcing phase as well as frequency which matters in the professional world. The phase jump is a tiny fraction of a degree for the big accumulators I use.
There is way of using a DTO to give exact ratios where the denominator isn't a binary power. I believe that the method is by John Chambers who worked at BBC Research labs many years ago. This involves changing the coefft when the accumulator overflows. It's not too hard to do and may allow a smaller accumulator. Though as it increases complexity elsewhere it may not give an overall saving. I can't find an online reference at the moment, can't even find my own notes.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv
