Museum TV installation

[ppppenguin]

I've been working on a peak white generator as noted a few posts ago. I realised that the PLD in the control panel has plenty of spare capacity. So I borrowed the mixed sync etc logic from another design and tweaked it for the 25MHz clock on the PLD module. After a few passes to get rid of obvious errors I've got this waveform. About 100 lines of VHDL including all the bank and comment lines. See below.

BTW, this is full spec 625 line waveform with proper vertical syncs and accurate timings. The 25MHz oscillator on my module is rather more accurate than you would expect for a cheap clock oscillator. It's within about 2ppm of nominal at room temperature, at least an order of magnitude better than needed.

Logic to video conversion is done by 3 resistors. I did the sums and clearly got them wrong as the amplitudes are all a bit low. I assumed 3.3V swing on the logic outputs and it's nearer 3.1V under load but that's not the problem.

If I install the Xilinx software on my laptop I can reprogram the one at the Museum when I'm next there. Soldering on the resistors is easy enough. The worst job will be making a hole in the front panel for another BNC socket. I'll have to take the whole panel out to avoid getting swarf in the kit.

I might make the generator a bit more sophisticated. Use a few more pins to make a better DAC so that it can also generate greyscale etc. How to select between different patterns? Possibly use the preview row of buttons since the test patterns won't be needed on the preview output.

Code:

-- 25MHz has 1600 clocks per line, 800 per half line
-- Active line 52us = 1300ck; H blank  12us = 300ck; H sync 4.7us = 117ck; Front porch 1.6us = 40ck; Broad pulse 27.3us = 683ck
process (CK25MHz) begin
    if rising_edge(CK25MHz) then
    
-- H counter 0-799
        HRESET <= HCOUNT = 798;    -- Pipeline
        if HRESET then HCOUNT <= 0;
            else        HCOUNT <= HCOUNT + 1;
        end if;        

-- Half line toggle        
        if HRESET then HALF_LINE <= not HALF_LINE; end if;
        
-- Mixed sync. Line sync is in 1st half line
        MS_START <= (not EQ_EN and (HCOUNT = 40) and not HALF_LINE)    -- Line sync on whole lines only
                         or (EQ_EN and (HCOUNT = 40))                            -- EQ half lines in field interval
                         or (BP_EN and (HCOUNT = 40));                        -- BP on half lines in field interval
        
        MS_END <= (not EQ_EN               and (HCOUNT = 40 + 117))        -- Sync pulses (4.7us)
                      or (EQ_EN and not BP_EN and (HCOUNT = 40 + 59))        -- EQ pulses (2.35us)
                      or (              BP_EN and (HCOUNT = 40 + 683));    -- Broad pulses (27.3us)

        if     MS_START then MIXED_SYNC <= true;    -- JK flipflop
            elsif MS_END then MIXED_SYNC <= false;
            else              MIXED_SYNC <= MIXED_SYNC;
        end if;
        
-- H blanking
        HBLANK_END <= HCOUNT = 300;
        
        if HRESET and HALF_LINE then HBLANK <= true;    -- JK flipflop
            elsif HBLANK_END     then HBLANK <= false;
            else                      HBLANK <= HBLANK;
        end if;
    
-- Mixed blanking
        MIXED_BLANKING <= HBLANK or VBLANK;
---------------------------

-- V counter
        if HRESET then    -- Count half lines
        
            VRESET <= VCOUNT = 623;    -- Pipelined
        
            if VRESET then VCOUNT <= 0;
                else        VCOUNT <= VCOUNT + 1 mod 1024;
            end if;

-- Odd/even field toggle
            if VRESET then HALF_FRAME <= not HALF_FRAME; end if;    -- Toggle every field            

-- Equalising pulses. 15 half lines
            EQ_EN_START <= VCOUNT = 5;            
            EQ_EN_END   <= VCOUNT = 5 + 15;
                                
            if       EQ_EN_START then EQ_EN <= true;    -- JK flipflop
                elsif EQ_EN_END   then EQ_EN <= false;
                else                   EQ_EN <= EQ_EN;
            end if;                

-- Broad pulses. 5 half lines
            BP_EN_START <= VCOUNT = 10;
            BP_EN_END   <= VCOUNT = 10 + 5;
                    
            if       BP_EN_START then BP_EN <= true;    -- JK flipflop
                elsif BP_EN_END   then BP_EN <= false;
                else                   BP_EN <= BP_EN;
            end if;

-- Vertical blanking
            VBLANK_START <= VCOUNT = 5;    -- First blanked: 623.5/311
            VBLANK_END   <= VCOUNT = 55;    -- First active: 23.5/336

            if       VBLANK_START then VBLANK <= true;    -- JK flipflop
                elsif VBLANK_END   then VBLANK <= false;
                else                    VBLANK <= VBLANK;
            end if;                

        end if;    -- HRESET

    end if; -- CK25MHz
end process;

TP(0) <= to_std_logic(VBLANK);
TP(1) <= to_std_logic(HBLANK);
TP(2) <= to_std_logic(HRESET);
TP(3) <= to_std_logic(VRESET);
VIDOUT(0) <= to_std_logic(HALF_FRAME);
VIDOUT(1) <= to_std_logic(not MIXED_BLANKING);
VIDOUT(2) <= to_std_logic(not MIXED_SYNC);