07-10-2017, 09:43 PM
Mine arrived a couple of days ago and the boards assembled without problems although I wish I'd fitted a pin header for programming before fitting the front panel.
I then flashed the board to the latest (064) firmware.
One thing I found is that the baseline was offset by about a quarter to a whole division depending on the range selected. (All with the input grounded.)
Apart from being annoying this meant that the measurements were out.
Examining the circuit of the analogue board showed two input networks with gains of 0.9 and 0.009 each followed by a voltage follower.
The output of either follower was selected by an analogue switch and amplified by 2 in the next stage.
The output of a stepped attenuator was selected by a second analogue switch and fed to the final amplifier with a gain of 9.
The output of the final amplifier was offset to 1.67v by a resistor from its summing junction to -5v analogue ( 5v x -R14/R13 = 5v x 1k/3k =1.67v)
For the most sensitive range (5mV/div) this gives an overall gain 0f 0.9 x1 x2 x9 = 16 so the output to the A/D on the main board is 80mV/div or +320mV full scale w.r.t. 1.67v
On the main board the A/D converter (in the ST32F103C8) is referenced to the 3.3v digital supply with half scale (1.65v) corresponding to the base line.
To me this gives rise to two problems...
1/ The output of the analogue board is referenced from the output of a 79L05 which has a tolerance of +250mV @ 5v so the output can vary by +83mV from nominal
The 3.3v digital supply is derived from an AMS1117 with a tolerance of +100mV @ 3v3 giving a baseline reference variation of 50mV.
Worst case this gives a fixed baseline offset of +130mV or 1.6div. This does not vary with sensitivity.
2/ The TL084 used for the gain stages has an offset voltage spec. of +10mV max (+3mV), in the unlikely event of all sections having the worst case offset in the same direction then the error at the output would be
((10 +10) x 2 + 10) x 9 = 450mV or 5.6divs!
Unless there is some auto-zero function that I have missed, then my 1div offset is pretty good, however I wanted better.
The fixed offset from cause 1 can be nulled by trimming the value of R13, in my case an additional 62ohms was required,
The variable offset (with sensitivity) from cause 2 can be nulled by a resistor from the junction of R5 & R6 (x2 stage summing junction) and + or -5v as required, in my case 1M to +5v was required.
(If the offsets or the two input buffers are widely different a similar resistor to the junction of R3 & R4 could be used to equalise them.)
After modification the trace on my unit remains within 0.2div of centre for all settings.
One other thing, on mine the 0.1v calibrator setting is actually 150mV. (I noticed that R31 on the main board was 220R and not 470 as in the circuit.)
Jim
I then flashed the board to the latest (064) firmware.
One thing I found is that the baseline was offset by about a quarter to a whole division depending on the range selected. (All with the input grounded.)
Apart from being annoying this meant that the measurements were out.
Examining the circuit of the analogue board showed two input networks with gains of 0.9 and 0.009 each followed by a voltage follower.
The output of either follower was selected by an analogue switch and amplified by 2 in the next stage.
The output of a stepped attenuator was selected by a second analogue switch and fed to the final amplifier with a gain of 9.
The output of the final amplifier was offset to 1.67v by a resistor from its summing junction to -5v analogue ( 5v x -R14/R13 = 5v x 1k/3k =1.67v)
For the most sensitive range (5mV/div) this gives an overall gain 0f 0.9 x1 x2 x9 = 16 so the output to the A/D on the main board is 80mV/div or +320mV full scale w.r.t. 1.67v
On the main board the A/D converter (in the ST32F103C8) is referenced to the 3.3v digital supply with half scale (1.65v) corresponding to the base line.
To me this gives rise to two problems...
1/ The output of the analogue board is referenced from the output of a 79L05 which has a tolerance of +250mV @ 5v so the output can vary by +83mV from nominal
The 3.3v digital supply is derived from an AMS1117 with a tolerance of +100mV @ 3v3 giving a baseline reference variation of 50mV.
Worst case this gives a fixed baseline offset of +130mV or 1.6div. This does not vary with sensitivity.
2/ The TL084 used for the gain stages has an offset voltage spec. of +10mV max (+3mV), in the unlikely event of all sections having the worst case offset in the same direction then the error at the output would be
((10 +10) x 2 + 10) x 9 = 450mV or 5.6divs!
Unless there is some auto-zero function that I have missed, then my 1div offset is pretty good, however I wanted better.
The fixed offset from cause 1 can be nulled by trimming the value of R13, in my case an additional 62ohms was required,
The variable offset (with sensitivity) from cause 2 can be nulled by a resistor from the junction of R5 & R6 (x2 stage summing junction) and + or -5v as required, in my case 1M to +5v was required.
(If the offsets or the two input buffers are widely different a similar resistor to the junction of R3 & R4 could be used to equalise them.)
After modification the trace on my unit remains within 0.2div of centre for all settings.
One other thing, on mine the 0.1v calibrator setting is actually 150mV. (I noticed that R31 on the main board was 220R and not 470 as in the circuit.)
Jim
