04-10-2018, 09:54 PM
Hello forum
I'm new to RF and currently working on trying to design and build my first receiver.
I'm aiming for TRF 118.5MHz AM airband, to listen to the planes coming in over the park
This is not my first attempt, my latest design suffers from self-oscillation. The oscillations are in fact the tank-frequency resonance frequency..
I've uploaded my front-end design...
The IDSS of the MPF102 FET was calculated to be 10mA, so I set the Id current to 5mA, thinking it is good practice to be near the middle... the output impedance is 135 ohm so I designed my transistor stage to have that inpout impedance. I added the 3uH RFC because the output impedance is quite close to my 150 ohm resistor... so I thought I needed to rise the impedance at RF.
Below that is the circuit I'm getting inspiration from. The same transistor (with unknown VGoff and IDSS) , but assuming I built the circuit with my MPF102 the Id current would only be 0.7mA, and the output impedance 538 ohm... this doesn't match the input impedance of the SA602 mixer which is 1.5K
now my questions:
1. when designing a common-drain for an RF front end, what parameters determine the desired drain current??
does a higher current have more risk of self-oscillation?
are we attempting to be near the middle of the range?
are we trying to achieve a specific output impedance?
2. how to kill self-oscillation?
I tried adding capacitors to the power supply, as close to D as possible.
Tried shielding, tried replacing the inductors with toroids, even tried shielding the FET itself.
on one post I read that a 'limiting resistor' could be placed between the tank circuit and the G, the value as a rule of thum should be between a few hundred ohm and a k. Ideally I'd like to understand if this is the solution .. WHY ? and how to optimize this resistor value, i.e. what am I trying to achieve with this value... my LC tank has a 87k (calculated) equivalent parallel R. I thought I should form a voltage divider for the signal coming back from the gate, so I selected this to be 10 times my parallel R... at 800k I thought relative to the gate (open circuit) this should not attenuate the signal at all, but signals coming back would be 10 times smaller by the time they get back to the tank... (?)
in practice the oscillations stopped, but I had no sensitivity at all.
my next idea is to put a 1M pot (dotted lines) to feed back some inverted signal, (need to add an R to the D), this negative feedback should kill oscillations and lower the gain a little...
is this the correct approach?
I've been experimenting for a long time (over three years) and have not managed a working radio yet.... I think just experimenting trying things out, is a dead end and is taking the joy out of what should be a hobby..
if anyone can please offer some advice, I am putting in the effort, that I guarantee, but sometimes it's just a matter of being told and guided and having someone to talk to.
Thanks for your help
Ryan

I'm new to RF and currently working on trying to design and build my first receiver.
I'm aiming for TRF 118.5MHz AM airband, to listen to the planes coming in over the park

This is not my first attempt, my latest design suffers from self-oscillation. The oscillations are in fact the tank-frequency resonance frequency..
I've uploaded my front-end design...
The IDSS of the MPF102 FET was calculated to be 10mA, so I set the Id current to 5mA, thinking it is good practice to be near the middle... the output impedance is 135 ohm so I designed my transistor stage to have that inpout impedance. I added the 3uH RFC because the output impedance is quite close to my 150 ohm resistor... so I thought I needed to rise the impedance at RF.
Below that is the circuit I'm getting inspiration from. The same transistor (with unknown VGoff and IDSS) , but assuming I built the circuit with my MPF102 the Id current would only be 0.7mA, and the output impedance 538 ohm... this doesn't match the input impedance of the SA602 mixer which is 1.5K
now my questions:
1. when designing a common-drain for an RF front end, what parameters determine the desired drain current??
does a higher current have more risk of self-oscillation?
are we attempting to be near the middle of the range?
are we trying to achieve a specific output impedance?
2. how to kill self-oscillation?
I tried adding capacitors to the power supply, as close to D as possible.
Tried shielding, tried replacing the inductors with toroids, even tried shielding the FET itself.
on one post I read that a 'limiting resistor' could be placed between the tank circuit and the G, the value as a rule of thum should be between a few hundred ohm and a k. Ideally I'd like to understand if this is the solution .. WHY ? and how to optimize this resistor value, i.e. what am I trying to achieve with this value... my LC tank has a 87k (calculated) equivalent parallel R. I thought I should form a voltage divider for the signal coming back from the gate, so I selected this to be 10 times my parallel R... at 800k I thought relative to the gate (open circuit) this should not attenuate the signal at all, but signals coming back would be 10 times smaller by the time they get back to the tank... (?)
in practice the oscillations stopped, but I had no sensitivity at all.
my next idea is to put a 1M pot (dotted lines) to feed back some inverted signal, (need to add an R to the D), this negative feedback should kill oscillations and lower the gain a little...
is this the correct approach?
I've been experimenting for a long time (over three years) and have not managed a working radio yet.... I think just experimenting trying things out, is a dead end and is taking the joy out of what should be a hobby..
if anyone can please offer some advice, I am putting in the effort, that I guarantee, but sometimes it's just a matter of being told and guided and having someone to talk to.
Thanks for your help
Ryan
