Golborne Vintage Radio

It's a while since I designed my 161 tap monster. It was for upsampling a 13.5MHz signal to 54MHz with wide bandwidth and very flat response. The final design was flat within 0.018dB to 5.75MHz with 60dB stopband attenuation. Possibly overkill but it was feasible in the Xilinx I was using. I used an online Parks McClellan/Remez tool that's no longer available. Due to symmetry and 4x oversampling each multiplier served 8 taps. Plus an extra mutliplier for the central tap.

It's very much a guess but I think a 17 tap filter needing 3 mutlipliers would give good enough results for many purposes. Going down to 9 taps and 2 multipliers might not be too bad. If you push the passband too close to half the input sampling frequency that really ups the number of taps. As does flattening the passband response. 0.02dB flatness needs many more taps than 0.2dB. For our kind of 615 to 405 converter a passband flatness of 1dB would be entirely adequate. If you wanted the equivalent of 3.5MHz BW at 405 lines that would equate to 3.5*625/405=5.4MHz at 625. It may not sound very different, but it's a much simpler proposition than 5.75MHz. It's the difference between 80% and 85% of the Nyquist limit.

I don't know what sort of oversampling filter Darryl used at the output of the Aurora. It's clearly good enough and there are only 4 multipliers in a Xilinx 3S100E. One of them must have been used in the vertical interpolator so a maximum of 3 for the oversampler.

Note: The Aurora uses 3 line vertical interpolation which requires 3 mutliplies per pixel. Provided the internal clock is at least 3x faster than the pixel rate this can be done in a single multiplier. In my own experimental converter I allowed for up to 4 line interpolation and ran the mutliplier at 4x pixel frequency. This was critical in my design as it used a (now) very old Spartan 2 Xilinx which doesn't have hardware mutlipliers. So they have to be built out of ordinary logic. The Xilinx tools do a good job but it's still resource hungry.

Hi Jeffrey
I just realized that I totally missed your post #169 . I think it might have happened because you posted as I was replying to your previous post and I just missed it.

The two fields of the test card are for the most part the same. The same background and foreground is used on each field. The only difference between the two fields is the point where it switches from background to foreground and visa versa to produce the circle. Each horizontal line of the test card consists of one line in each field. It does look quite harsh.

In case anyone is interested in them I have started to upload the files for this project to a site which can be found here.

Frank

Just an update.

Firstly let me say a big thank you to forum members djrm and Neutron. Between them they have send me a bunch of errors and omissions from the website and also in the documents on it. I believe I have them all corrected now and the documents updated. The corrections will make it easier for anyone constructing a Hedghog. I have constructed several Hedghog's but I don't rely on the documents so if there is any other errors fond please let me know.

I have also updated the FPGA program file it is now HEDGHOG_V2_09_2018.jic
I have made improvements to the oversampler coefficients and some minor tweaks to the interpolater coefficients. To be honest I don't think you would notice any difference on screen.

Frank

I've built a Hedghog 625 to 405 converter from the information on Frank Cuffe's website http://electronics.frankcuffe.ovh/hedghog and it works very well.

There were some typos in the documentation, but I told Frank and he immediately corrected them so the files on his website should be correct.

I was able to get almost all the components from Farnell and one from RS when Farnell was out of stock. The two modulators I found at a supplier I'd never heard of in Shenzen, but they work well. The boards were made for me by AllPCB.com. I haven't tried all the suggested alternatives myself.

(I'd attach my parts list spreadsheet which shows the sources and has some further notes, but I haven't spotted how to attach documents here, only insert images.)

Using a £14 EP2C5 development board and £10 Altera FPGA/CPLD USB Blaster compatible programmer both from Amazon, and Altera Quartus II software, I first tried a simple LED flashing routine to prove the Cyclone II and Blaster hardware worked. Then I uploaded Frank's .jic file, plugged the board into the Hedghog and everything worked fine.

These dev boards are very thin, so Frank warns to be careful if removing them as the force needed to extract the 112 pins of the main connectors can cause damage. The second one I bought had poor soldering and showed an intermittent fault as soon as it was plugged in. These little boards make a cheap and convenient way of getting an FPGA and flash memory, but you do get what you pay for. I have listed an alternative slightly more expensive source which also stocks a USB Blaster compatible programmer.

In his notes, Frank describes modifying some phono sockets from Mouser to make them fit the board as the originals are no longer available. I tried to use sockets from Farnell instead, but they needed even more modification and are a different height on the board, so in future I'd wait until I needed other things from Mouser to reach their minimum order threshold, then get the better phonos from them!

I used a thinner case than Frank's original and both types are in my parts list. To fit the smaller one, I had to make a heatsink from a bent strip of aluminium.

I was interested in the DIP switch functions VD osc and DB osc. Frank replied they were just for diagnostic purposes:

Quote:VD osc = Video Decoder oscillator. If it is functioning the front panel LED will flash  
DB osc = Development Board oscillator. If it is functioning the front panel LED will flash
FID (the two switches on together) = Field identification signal front panel LED will flash if it is present. It is only present if the video decoder is producing a valid PAL signal.
At power up the video decoder defaults to NTSC if there is not a PAL signal feeding the video decoder (LED wont flash). when a PAL signal is present it switches to PAL and remains at PAL even if the PAL signal is removed.

I have already used the Hedghog to help restore a faulty Bush TV62 and I'm about to build another for a friend who wants a picture source for his working TV62! I am very pleased with it. Even including minimum order quantities and the USB programmer (which you may have other uses for), one can be built for less than the cost of an Aurora and it is fun! For two, the cost comes down to about 3/4 of an Aurora. Farnell aren't the cheapest supplier and others may have better minimum quantities, so greater savings are definitely possible

That's brilliant indeed.
I'd no idea of the costs involved but looks like a substantial saving over an Aurora if you make two or three.
I am very pleased with mine that was kindly sent to me some months ago from Frank.

Neutron, welcome to GVR. And what an introduction!

That really is brilliant. It shows that Frank's design is reproducible. This is important, a lot of designs published in magazines such as Practical Wireless and Wireless World often had tolerancing problems, sometimes serious errors.

If I was building a Hedghog I'd find a way to use BNCs for video input and output. I really don't like using phonos for video.

Frank's article about the Hedghog should be appearing in the next issue of the BVWS Bulletin (not the one that's just arrived).

Well done Neutron with the build and very well done to Frank also. It's a real tribute to his excellent and very professional design.

Peter

Both Peter Scott and I have done design work professionally for most of our careers. We know what it means to not only design something that works on the lab bench but also stays working in the field and doesn't give grief in production. I know I've made my share of mistakes, designs that really wern't as good as they should have been.

For Frank, who doesn't come from a professional design background, to have achieved this level of quality and reproducibilty, is a great achievement.

FWIW, I'm in correspondence with a friend about his Aurora with a fault at the moment. The problem is slow boot, something that's normally almost instant. It looks like the 14.318MHz xtal on the decoder which is also the master clock for much of the design. It's not a design or tolerancing fault, just a duff xtal that's been getting worse over a period.

I totally echo Jeffreys words.
It is an amazing achievement, no way on Gods earth could I do what Frank has done.
Well done Sir.

Let's not forget Franks previous achievements.
A diode split LOPT made from scratch for a 405 line TV and of course the Test Card generator for 405 Lines.